This invention relates generally to multilayer capacitance structures and printed circuit boards containing such structures and methods of manufacturing the same. In more particular aspects, this invention relates to a multilayer capacitance structure which contains generally two power planes and a ground plane, which are self supporting structures, and printed circuit boards embodying the same.
The ever-increasing operating speeds and simultaneous switching of electrical devices on printed circuit boards require higher and higher capacitance densities to reduce switching noise and EMI to acceptable levels. The current industry benchmark standard for capacitance structures is a single sheet of epoxy-glass between power and ground planes that provides a capacitance density of approximately 450 pF/in2. This is barely adequate to meet only minimal requirements of present day applications and clearly is not adequate to meet future requirements which will require significantly increased capacitance density.
A method of forming a capacitive core structure and of forming a circuitized printed wiring board from the core structure and the resulting structures are provided. The capacitive core structure is formed by providing a central conducting plane of a sheet of conductive material and forming at least one clearance hole in the central conducting plane. First and second external conducting planes are laminated to opposite sides of the ground plane with a film of dielectric material between each of the first and second external planes and the central conducting plane. At least one clearance hole is formed in each of the first and second external planes. A circuitized wiring board structure can be formed by laminating a capacitive core structure between two circuitized structures. The invention also relates to the structures formed by these methods.